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<p class="MsoNormal"><b><span style="font-family:"Arial",sans-serif">Electrical and computer engineer for applications in retinal imaging and vision science<o:p></o:p></span></b></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif;color:black">The Center for Visual Science is seeking an engineer to develop advanced data acquisition and image processing systems for applications in vision research. An ideal candidate would
 have experience in instrument control, user interfaces, programming hardware, image acquisition and real-time processing.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif;color:black"><o:p> </o:p></span></p>
<p class="MsoNormal" style="background:white"><span style="font-family:"Arial",sans-serif;color:black">The successful applicant will join a collaborative team of vision scientists and engineers that design and deploy imaging systems to study vision and the
 eye including: retinal imaging, eye tracking, ocular imaging and microscopy of living systems.</span><span style="font-family:"Arial",sans-serif;color:black"> This work is directed both at advancing our understanding of the visual system and the development
 of novel therapies. The Center for Visual Science is a leader in adaptive optics scanning laser ophthalmoscopy (AOSLOs) for high resolution retinal imaging and developing these instruments will be one focus area for this role</span><span style="font-family:"Arial",sans-serif;color:black">.<u>
 Background in vision science is not a requirement.</u> The successful candidate will have considerable independence, and should be a team player comfortable working in a vigorous, fast-paced and exciting research environment.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif;color:black"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-family:"Arial",sans-serif">Preferred (but not essential) Qualifications</span></b><span style="font-family:"Arial",sans-serif">: 
<o:p></o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">       
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Arial",sans-serif">Experience programming hardware device drivers based on 64-bit Microsoft Windows and optimization of hardware interrupts. 
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
<p class="MsoListParagraphCxSpFirst" style="text-indent:-.25in;mso-list:l0 level1 lfo1">
<![if !supportLists]><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">       
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Arial",sans-serif">Experience with nVidia GPU parallel programming with native CUDA C language for real-time data processing and system control.<o:p></o:p></span></p>
<p class="MsoListParagraphCxSpMiddle"><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
<p class="MsoListParagraphCxSpLast" style="text-indent:-.25in;mso-list:l0 level1 lfo1">
<![if !supportLists]><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">       
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Arial",sans-serif">Experience with frame grabbers and video/digital data acquisition boards such as Arduino, LabView, National Instruments, Texas Instruments, Matrox. AMD, Xilinx etc.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">       
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Arial",sans-serif">FPGA programming experience with VHDL or Verilog languages (for example  mechanism of PCIe state machine, machine-level access & control of video chips and other chips
 such as DAC, ADC, SRAM, and DRAM with bus protocols such as SPI and I<sup>2</sup>C, ultra-fast FPGA clock management, management and optimization of FPGA resources such as flip flops, arithmetic logics, LUTs, and block RAMs.).
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">       
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Arial",sans-serif">Experience writing MFC Desktop Applications for Windows</span><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif">Interest and enthusiasm for engineering to advance research in neuroscience and medicine.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
<p class="MsoPlainText"><span style="color:#131313">The start date is flexible - March 1<sup>st</sup> or a soon as possible thereafter preferred.  Interested applicants are welcome to contact Jesse Schallek (</span><a href="mailto:jschall3@ur.rochester.edu">jschall3@ur.rochester.edu</a><span style="color:#131313">)
 to discuss the opportunity informally, or to apply please send a CV, cover letter and a list of three referees (within the cover letter itself) to Debbie Shannon (</span><a href="mailto:dshannon@ur.rochester.edu">dshannon@ur.rochester.edu</a><span style="color:#131313">)
 . <o:p></o:p></span></p>
<p class="MsoPlainText"><span style="color:#131313"> </span><span style="font-size:10.0pt;color:#131313">Official Application: 
</span><a href="https://www.rochester.edu/faculty-recruiting/login">https://www.rochester.edu/faculty-recruiting/login</a>  search for: Computer Engineer (CVS, 2023, 12622NT)<o:p></o:p></p>
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<b><span style="font-size:10.0pt;color:#131313">Applicants from diverse backgrounds are encouraged to apply. The University of Rochester is an equal opportunity employer.<o:p></o:p></span></b></p>
<p class="MsoBodyTextCxSpMiddle" style="mso-margin-top-alt:0in;margin-right:9.35pt;margin-bottom:0in;margin-left:0in;margin-bottom:.0001pt;mso-add-space:auto">
<span style="font-size:12.0pt;color:#131313"><o:p> </o:p></span></p>
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<b><u><span style="font-size:11.0pt;color:#131313">Links:<o:p></o:p></span></u></b></p>
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<b><u><span style="font-size:11.0pt;color:#131313"><o:p><span style="text-decoration:none"> </span></o:p></span></u></b></p>
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<img border="0" width="78" height="38" style="width:.8083in;height:.3916in" id="Picture_x0020_3" src="cid:image001.png@01D93BC2.8F9A7960" alt="Center for Visual Science icon"><span style="font-size:11.0pt">                 Center for Visual Science:  
</span><a href="https://www.cvs.rochester.edu/index.html"><span style="font-size:11.0pt">https://www.cvs.rochester.edu/index.html</span></a><span style="font-size:11.0pt"><o:p></o:p></span></p>
<p class="MsoBodyTextCxSpMiddle" style="mso-margin-top-alt:0in;margin-right:9.35pt;margin-bottom:0in;margin-left:0in;margin-bottom:.0001pt;mso-add-space:auto;text-indent:-9.0pt">
<img border="0" width="118" height="52" style="width:1.2333in;height:.5416in" id="Picture_x0020_2" src="cid:image002.jpg@01D93BC2.8F9A7960" alt="ARIA logo"><span style="font-size:11.0pt">         Advanced Retinal Imaging Alliance (ARIA):
</span><a href="https://aria.cvs.rochester.edu/"><span style="font-size:11.0pt">https://aria.cvs.rochester.edu/</span></a><span style="font-size:11.0pt"><o:p></o:p></span></p>
<p class="MsoBodyTextCxSpMiddle" style="mso-margin-top-alt:0in;margin-right:9.35pt;margin-bottom:0in;margin-left:0in;margin-bottom:.0001pt;mso-add-space:auto">
<span style="font-size:11.0pt"><o:p> </o:p></span></p>
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<img border="0" width="140" height="29" style="width:1.4583in;height:.3in" id="Picture_x0020_1" src="cid:image003.png@01D93BC2.8F9A7960" alt="University of Rochester logo"><span style="font-size:11.0pt"> University of Rochester:
</span><a href="https://www.rochester.edu/"><span style="font-size:11.0pt">https://www.rochester.edu/</span></a><span style="font-size:11.0pt"><o:p></o:p></span></p>
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<b><span style="font-size:10.0pt"><o:p> </o:p></span></b></p>
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<b><span style="font-size:10.0pt">Email:<o:p></o:p></span></b></p>
<p class="MsoBodyTextCxSpMiddle" style="mso-margin-top-alt:0in;margin-right:9.35pt;margin-bottom:0in;margin-left:0in;margin-bottom:.0001pt;mso-add-space:auto">
<span style="font-size:10.0pt;color:#131313">Jesse Schallek: (</span><a href="mailto:jschall3@ur.rochester.edu"><span style="font-size:10.0pt">jschall3@ur.rochester.edu</span></a><span style="font-size:10.0pt;color:#131313">) to discuss the opportunity informally<o:p></o:p></span></p>
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<span style="font-size:10.0pt;color:#131313">Debbie Shannon (</span><a href="mailto:dshannon@ur.rochester.edu"><span style="font-size:10.0pt">dshannon@ur.rochester.edu</span></a><span style="font-size:10.0pt;color:#131313">) to apply.<o:p></o:p></span></p>
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<span style="font-size:10.0pt;color:#131313"><o:p> </o:p></span></p>
<p class="MsoBodyTextCxSpLast" style="mso-margin-top-alt:0in;margin-right:9.35pt;margin-bottom:0in;margin-left:0in;margin-bottom:.0001pt;mso-add-space:auto">
<span style="font-size:9.0pt;color:#131313"><o:p> </o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Debbie Shannon, Administrator <br>
Center for Visual Science <br>
Box 319 <br>
Rochester, NY  14620 <br>
(585) 275-6864 office <br>
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